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Difference Between Apple A5 and NVIDIA Tegra 3

November 13, 2011 Posted by Roshan Ragel

Apple A5 vs NVIDIA Tegra 3 | Nvidia Tegra 3 Quad-Core Processor vs Apple A5 Processor Speed, Performance
 

This article compares two recent System-on-Chips (SoC), Apple A5 and NVIDIA Tegra3, designed for consumer electronics by Apple and NVIDIA respectively. In a Layperson’s term, a SoC is a computer on a single IC (Integrated Circuit, aka chip). Technically, a SoC is an IC that integrates typical components on a computer (such as microprocessor, memory, input/output) and other systems that cater electronic and radio functionalities. Both Apple A5 and NVIDIA Tegra3 are Multiprocessor System-on-Chip (MPSoC), where the design uses multiprocessor architecture for exploiting the available computing power. While Apple released A5 in March 2011 with its iPad2, NVIDIA released Tegra3 in November 2011, and it is yet to be used in consumer electronics.

Typically, the major components of a SoC are its CPU (Central Processing Unit) and GPU (Graphics Processing Unit). The CPUs in both Apple A5 and Tegra3 are based on ARM’s (Advanced RICS – Reduced Instruction Set Computer – Machine, developed by ARM Holdings) v7 ISA (Instruction Set Architecture, the one that is used as the starting place of designing a processor).

Apple A5

A5 was first marketed in March 2011, when Apple released its latest tablet, iPad2. Later Apple’s recent iPhone clone, iPhone 4S was released equipped with Apple A5. Apple A5 was designed by Apple and manufactured by Samsung on behalf of Apple. As opposed to its predecessor Apple A4, A5 has dual cores in its both CPU and GPU. Therefore, technically Apple A5 is not just a SoC, but also a MPSoC (Multi Processor System on Chip). A5’s dual core CPU is based on ARM Cotex-A9 processor (that uses the same ARM v7 ISA that is used by Apple A4), and its dual core GPU is based on PowerVR SGX543MP2 graphics processor. A5’s CPU typically clocks at 1GHz (the clocking uses frequency scaling; therefore, the clock speed can change from 800MHz to 1GHz, based on the load, targeting power saving), and its GPU clocks at 200MHz. A5 has both L1 (instruction and data) and L2 cache memories. A5 comes with a 512MB DDR2 memory package that is typically clocked at 533MHz.

NVIDIA Tegra3 (Series)

NVIDIA, originally a GPU (Graphics Processing Unit) manufacturing company [claimed to have invented GPUs in the late nineties] have recently moved into the mobile computing market, where NVIDIA’s System on Chips (SoC) are deployed in phones, tablets and other handheld devices. Tegra is a SoC series developed by NVIDIA targeting deployment in the mobile market. The first MPSoC in Tegra3 series was released in early November 2011 and yet to be deployed in commercially available devices.

NVIDIA claims that Tegra3 is the first mobile super processor, for the first time putting quad core ARM Cotex-A9 architecture together. Although Tegra3 has four (and therefore quad) ARM Cotex-A9 cores as its main CPU, it has an auxiliary ARM Cotex-A9 core (named the companion core), which is identical in architecture to the others, but etches on a low power fabric and clocks at a very low frequency. While the main cores can clock at 1.3GHz (when all four cores are active) to 1.4GHz (when only one of the four cores is active), the auxiliary core clocks at 500MHz. The target of the auxiliary core is to run background processes when the device is in standby mode and, therefore, saving power. The GPU used in Tegra3 is NVIDIA’s GeForce, which has 12 cores packed into it. Tegra 3 has both L1 cache and L2 cache that is similar to that of Tegra 2, and it allows packing of up to 2GB DDR2 RAM.

A comparison between Apple A5 and NVIDIA Tegra3 is tabulated below.

 

Apple A5

Tegra 3 Series

Release Date

March 2011

November 2011

Type

MPSoC

MPSoC

First Device

iPad2

Not Deployed Yet

Other Devices

iPhone 4S

–

ISA

ARM v7 (32bit)

ARM v7 (32bit)

CPU

ARM Cotex A9 (Dual Core)

ARM Cortex-A9 (Quad Core)

CPU’s Clock Speed

1GHz (800MHz-1GHz)

Single Core – up to 1.4 GHz

Four Cores – up to 1.3 GHz

Companion Core – 500 MHz

GPU

PowerVR SGX543MP2 (dual core)

NVIDIA GeForce (12 cores)

GPU’s Clock Speed

200MHz

Not Available

CPU/GPU Technology

TSMC’s 45nm

TSMC’s 40nm

L1 Cache

32kB instruction, 32kB data

(for each CPU core)

32kB instruction, 32kB data

(for each CPU core)

L2 Cache

1MB

(shared among all CPU cores)

1MB

 (shared among all CPU cores)

Memory

512MB Low Power DDR2, clocked at 533MHz

Up to 2GB DDR2

Summary

In summary, NVIDIA, in the name of Tegra 3 series, has come out with an MPSoC with high potentials. It obviously outperforms Apple A5 on paper in both computing power and graphics performance. The idea of a companion core is very neat, as it can be put to high use for mobile devices as such devices are in standby mode more often than not, and they are expected to run background tasks. Apple A5 has proved to be a market success in its deployment, iPad2 and iPhone 4S. Some can argue that the expensive, low- power fabric used in the companion core can burden the users.  How the mobile computing industry is going to utilize the potential and the market viability of Tegra3 is yet to be seen.

Related posts:

Difference Between Apple A5 and Samsung Exynos 4210 Difference Between Quad core Nvidia Kal-El (Tegra 3) and Nvidia Tegra 2 Difference Between Apple A4 and A5 Processors Difference Between NVIDIA Tegra 2 and Tegra 3 Difference Between NVIDIA Tegra 2 and Apple A5

Filed Under: Processor Tagged With: A5, Apple A5, Apple A5 CPU, Apple A5 GPU, Apple A5 Processor, Apple A5 processor info, Apple A5 vs, ARM Cotex-A9 processor, companion core, first quad core processor, MPSoC, Nvidia Tegra 3, NVIDIA Tegra 3 vs, Nvidia Tegra3, NVIDIA Tegra3 CPU, NVIDIA Tegra3 GPU, NVIDIA Tegra3 processor, NVIDIA Tegra3 processor info, NVIDIA Tegra3 vs, NVIDIA’s GeForce GPU, PowerVR SGX543MP2, quad core ARM Cotex-A9, Quad Core processor, quad core processors, Tegra 3, Tegra 3 vs, Tegra3

About the Author: Roshan Ragel

Dr.Roshan G. Ragel, is a Doctorate in Computer Science and Engineering and Member of IET (UK) and IEEE. His research interests include Micro-architectural aspects of Embedded Systems Design and their Security and Reliability issues.

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